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ASIC
Application Specific Integrated Circuits are application specific custom made ICs.
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Silicon Oscillators
Analog Devices silicon oscillators are frequency programmable via pin-strapping, or through the resistor connection or serial interface (SPI or I2C). These solid-state clocks are well-suited for general-purpose usage, such as PGAs, ASICS, microprocessors, or UARTS, and they operate from 1 kHz to 170 MHz. Silicon oscillators are also ideal switching regulator clocks as they provide synchronization and EMI reduction (via spread spectrum).
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PCI Express IP
Rambus silicon-proven, high-performance PCI Express® (PCIe®) 6.0, 5.0, 4.0 and earlier generation digital controllers are optimized for use in SoCs, ASICs and FPGAs. These market-leading solutions for high-performance interfaces address AI/ML, data center and edge applications.
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ARM Development Studio 5
DS-5
ARM DS-5 is the tool-chain of choice for software developers who want to fully realize the benefits of the ARM Architecture. Comprising features such as the best-in-class ARM Compiler, powerful OS-aware debugger, system-wide performance analyzer, and real-time system simulator, DS-5 is an integrated development environment that assists engineers in delivering optimized and robust software for ARM processor-based ASICs and ASSPs.
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Transducer / Transmitter
General purpose industrial pressure transducer provides outstanding integrity concerning high shock, vibration and pressure cycling. Utilizing high-performance ASIC, digital compensation provides excellent temperature performance, while the thin film sensor enables long-term stability.
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IF/RF Receivers
IF and RF Receivers are designed for communications infrastructure applications. Wide input bandwidth and high sample rates allow digitizing close to the antenna. Various receiver architectures, such as zero-IF, IF sampling to direct RF receivers, are supported and available on chip post digital signal processing can be used to offset demands in the FPGA or digital ASIC and ease analog filtering.
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CompuScope GPU CUDA Processing
Performing real-time digital signal processing (DSP) routines such as Fast Fourier Transform (FFT), Signal Averaging, Finite Impulse Response (FIR) Filtering, Digital Down Conversion (DDC) and more have traditionally required the use of dedicated DSP processors, Field Programmable Gate Arrays (FPGAs), or Application Specific Integrated Circuits (ASICs).
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STP Engine (IP Core)
The Stream Transpose® (STP) engine is a reconfigurable processor (DRP: Dynamically Reconfigurable Processor) core that combines the flexibility of software and the speed of hardware. The firmware defining processing can be reconfigured in an instant, allowing an almost infinite variety of functions to be integrated into a system. A 40nm process is currently available for ASIC.
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Constraints Certifier Platform
ConCert
ConCert is a sign-off platform providing a unique system for verification, demotion and budgeting of timing constraints at any stage of the ASIC or FPGA flow.
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PCI Express 5 Base Specification Receiver Test Automation
N5991PB5A
The N5991PB5A is the receiver test automation software for bit error ratio testers, allowing you to test and characterize PCI Express 5.0 ASICs
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Digital Oscilloscope
MSO/DS7000
The MSO/DS7000 series digital oscilloscope is a mid-end mixed-signal digital oscilloscope based on RIGOL's proprietary intellectual property ASIC chip and UltraVision II technology platform.
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Digital Solutions
Dexter's Digital Detectors and Temperature Sensor Modules (TSM's) are based on Dexter's superior silicon thermopile technology and incorporate an ASIC that provides a cost effective front end for reading out the detector output. The digital solutions include pre-amplification, A/D, multi-plexing and SMBus communications. Additionaly, the SMBus can accommodate communications with up to 100 digital products. Our digital solutions are housed in industry standard TO-5/TO-39 packages.
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Digital Oscilloscope
MSO8000
The MSO8000 series digital oscilloscope is a mid- to high-end mixed-signal digital oscilloscope based on RIGOL's proprietary intellectual property ASIC chip and UltraVision II technology platform.
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360 EC-FPGA
Functional correctness of FPGA synthesis from RTL code to final netlist. Systematic design errors, introduced by automated design refinement tools, such as synthesis, can be hard to detect, and damaging if they make it into the final device. Formal equivalence checking has been used for ASIC design flows for many years. As FPGAs become bigger and critical system components, exhaustively verifying the functional equivalence of Register Transfer Level (RTL) code to synthesized netlists and the final placed & routed FPGA designs is mandatory.
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ASICs
ams has been creating unique ASIC (Application Specific Integrated Circuit) solutions in partnership with customers for over 30 years. We enable our partners to create highly differentiated products that are smarter, safer, easier to use and more eco-friendly. Our various industry experts in automotive, industry, medical and smart building are looking forward to talk to you and to define the solution which will exactly fit your needs.
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The Intel® RealSense™ Depth Sensing Portfolio
Intel® RealSense™ offers a range of stereo vision cameras and modules, supported by an extensive open-source SDK. The D400 product line helps you ensure that you can add robust three-dimensional vision capability to your products or systems. The cameras feature an integrated ASIC that performs real-time depth calculation directly on the camera, saving you processing resources on the host system. The SDK allows you to further tune the depth data stream to your needs.
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Analyze RTL
ASICs and FPGA routinely have millions of gates with memories, transceivers, third party IP and processor cores. Problems can be time consuming and complex to debug in the lab and through simulations. Designers need verification tools that can identify problems quickly to reduce their verification and debug time before simulation, before synthesis, and definitely before burning chips in the lab.
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EMBEDDED MMC (EMMC)
SD 3.0 / eMMC 4.51 IP Family
The eMMC Host IP is an RTL design in Verilog that implements an MMC / eMMC host controller in an ASIC or FPGA. The core includes RTL code, test scripts and a test environment for full simulation verifications. The Arasan MMC / eMMC Host IP Core has been widely used in different MMC applications by major semiconductor vendors with proven silicon.
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FPGA Image Processing (IP) Development Kit
ProcVision
Gidel’s Vision Pro Development Kit is an optimal solution for developing,validating, demonstrating and evaluating Image Processing (IP) andpipeline designs on FPGA.The suite is designed to provide a complete and convenient envelop enablingthe developer to focus strictly on the proprietary image processingdesign. The entire Vision Pro flow is within a single FPGA, independentof the final target application(s). The Vision Pro flow is composedof a pipeline that streams simulated data to the user image processingdesign under test (DUT) and then captures the design’s output streamfor displaying, storing, analysis and/or co-processing on host software.The entire process is performed on a single FPGA without the need foradditional peripheral connectivity or tools.Vision Pro suite is plug-and-play enabling the developer to begin at oncethe IP design development and validation. A simple design example providesthe developer immediate hands-on familiarization with the systemflow and supporting tools. The final design can be ported to any IntelFPGA device or other vendors’ devices (FPGA or ASIC) by replacing basiclibraries. To significantly reduce compilation time, initial design developmentmay be on a small FPGA device and later compiled for the targetdevice(s). The target implementation may use any FPGA board. For a fullImaging/Vision system solution, Gidel offers a number of off-the-shelfgrabbers and FPGA accelerators that are designed to utilize these imageprocessing blocks and Gidel Imaging Library (GIL).
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Electrical Testing Services
Integra provides extensive experience with complex test development: Digital & Mixed Signal Devices: Microprocessor, Microcontrollers DSP, ASIC. Linear: DAC, ADC, Operational Amplifier, Comparator, Multiplexer, Interface, Discrete. Memory: SDRAM, DDR, SRAM, SSRAM, Flash, EEPROM, EPROM. Logic: 74xxx, 16/32-bit, ECL. RF, 8GHz typical and experience to 50GHz: PA, LNA, Filter, Mixer. Expertise in developing test plans (semi mfgr production & device characterization)
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PCI Express 4 Base Specification Receiver Test Automation
N5991PB4A
The N5991PB4A is the receiver test automation software for bit error ratio testers, allowing you to test and characterize PCI Express 4.0 ASICs.
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3U VPX Flash Storage Module
Curtiss-Wright Defense Solutions
The 3U VPX (VITA 46 and 48.2) Flash Storage Module (FSM) provides high-performance, high-capacity, solid-state SATA storage with AES-256 bit encryption using an Application Specific Integrated Circuit (ASIC) that is FIPS-140-2 validated (Certification #1472). The 1" pitch conduction-cooled solid state storage device utilizes high reliability SLC NAND flash designed for the most demanding application.
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Centralized Motion Controller
ADLINK‘s pulse train controllers provide comprehensive and application-oriented motion functions for servo and stepper motors through digital signal processing (DSP)-based and Application Specific Integrated Circuit (ASIC)-based two pulse train mode controllers to achieve excellent synchronous motion control and precise positioning suitable for laser engraving, marking and cutting applications in semiconductor, AOI, and conventional manufacturing industries.
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Hybrid Verification Platform
HES-DVM
HES-DVM™ is a fully automated and scalable hybrid verification environment for SoC and ASIC designs. Utilizing the latest co-emulation standards like SCE-MI or TLM and newest FPGA technology, hardware and software design teams obtain early access to the hardware prototype of the design. Working concurrently with one another they develop and verify high-level code with RTL accuracy and speed-effective SoC emulation or prototyping models reducing test time and a risk of silicon re-spins.
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Digital Pattern Generator
Wave Gen Xpress
A digital pattern generator is an essential stimulus source for almost every type of digital device: digital and mixed-signal ASIC, FPGA, microprocessors and microcontrollers. The digital pattern generator can be used early in the design cycle to substitute for system components that are not yet available.
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Ultrascale FPGA PCIe Board
SE100 – Solar Express
Sundance Multiprocessor Technology Ltd.
SE100 is based on Xilinx’s Virtex Ultrascale FPGA XCVU190-2FLGC2104E, and is a powerful processing card with plenty of IO capabilities to meet the needs of modern compute-intensive applications such as Supercomputing, Data Centers and defense. The board can optionally be populated with 095, 125, and 160 devices in C2104 package for reduced cost. Host interface is via 8 lanes of PCIe Gen3 but the card can also be used as an embedded, standalone, hardware too. Multiple cards can be cascaded to provide a multi-FPGA system with cards connected together via the board’s fast IO channels to meet the needs of even more demanding applications like ASIC design and Stock Market fast trading systems.
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Pressure Sensors
ESCP-MIS1 Sensor
ES Systems has developed a series of medium isolated pressure sensors suitable for applications with harsh environmental conditions where resistance to corrosive fluids or gases is required. Each sensor integrates a MEMS capacitive pressure sensor die, and a CMOS ASIC for the signal conditioning. The MEMS pressure sensor dies are underpinned by ES’s innovative microfabrication process for silicon capacitive sensors.
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Oscilloscope
RTP
The R&S®RTP high-performance oscilloscope combines high-class signal integrity with a fast acquisition rate. Customized frontend ASICs and realtime processing hardware enable highly accurate measurements with unprecedented speed in a compact form factor.
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Clock Domain Crossing Sign-off Solution
Meridian CDC
Meridian CDC is the fastest, highest capacity and most precise CDC solution in the market. It performs comprehensive structural and functional analysis to ensure that signals crossing asynchronous clock domains on ASIC, or FPGA devices are received reliably. Meridian CDC is the only solution that enables all aspects of CDC sign-off for giga-gate SoC designs.
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Wafer Probe Test System
STI3000
The STI3000 is a wafer-level MEMS and mixed signal ASIC probe test system that combines several functional STI test equipment blocks for testing gyros, accelerometers, pressure sensors, microphones, resonators, and mixed signal ASICs.
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Motion Control Solutions
DDC offers a complete line of Synchro/Resolver instrument-grade cards and test equipment including angle position indication and simulation, plus a variety of hardware and software to meet today’s civil, military, and COTS/MOTS requirements. DDC is a leading supplier of Synchro/Resolver-to-Digital and Digital-to-Synchro/Resolver components—the smallest, most accurate synchro/resolver-to-digital and digital-to-synchro/resolver converters available today. Most of these single chip and hybrid converters are based on ASIC designs, yielding the most reliable and affordable converters ever offered, and are the building blocks for DDC’s card-level products.
