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Verification IP
test and verify SoC's protocols and interface buses.
- Omnicor
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IP Performance Testing Tools
Ethernet switches, routers and gateways have their distinct purposes and it is important to test their performance well. During R&D and DVT products are usually tested on L2/L7 while in production basic L2/L3 tests are usually sufficient. For those who follow testing methodology RFC 2544 and RFC 2889 are also available.IP traffic packet generators/analyzers for 10/100/1000 Mbps, gigabit and 10 gigabit with PoE options are the most important test instruments to ensure Ethernet switch or router product quality is verified. Gigabit TAP analyzers, media convertors, production test software suites and Ethernet cable emulators are additional tools used in conjunction with stream generators to help ensure fast development cycle and high quality. Our IP performance test systems are economic and known worldwide for excellence in quality and service support.
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MIPI Total Display IP Solution
DSI
The Arasan MIPI Display Serial Interface (DSI) Controller IP provides both device and host functionality. Additionally, the DSI Controller provides a high-speed serial interface between an application processor and display and follows a rigorous verification methodology to ensure interoperability of our DSI digital controller with our D-PHY analog IP. Arasan’s DSI solutions are MIPI standards-compliant and are designed to accelerate integration, lower risk and accelerate time to market for developers of display applications. Arasan’s expertise is backed by our unique silicon proven design discipline and product development process that ensures fast silicon success with our analog and digital IP.
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ADSL / 2 / 2+ Handheld VoIP Tester
QuickTest 500
*Rapid Testing. The QuickTest 500 ADSL2+ Tester's automatic Service Verification Test Suite starts as soon as you switch on (results are typically obtained in less than 3 minutes)*Simple to use. Virtually no product training required with QuickTest 500 ADSL Tester*Configurable Pass / Fail Indicators on the LCD display and clearly presented in multi-colour LEDs on the front panel*No need to get a laptop out*Save and name up to 16 test results at any one time*Line Voltage LED indicates poor, missing or excessive Line Voltage*ADSL/2/2+ Test LEDs to indicate if ADSL Showtime achieved*In Service LED indicates problems with PPP or IP layer*LEDs to indicate problems with the Trained Line Rate, poor Noise Margin or excessive Line Attenuation
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Analyze RTL
ASICs and FPGA routinely have millions of gates with memories, transceivers, third party IP and processor cores. Problems can be time consuming and complex to debug in the lab and through simulations. Designers need verification tools that can identify problems quickly to reduce their verification and debug time before simulation, before synthesis, and definitely before burning chips in the lab.
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EMBEDDED MMC (EMMC)
SD 3.0 / eMMC 4.51 IP Family
The eMMC Host IP is an RTL design in Verilog that implements an MMC / eMMC host controller in an ASIC or FPGA. The core includes RTL code, test scripts and a test environment for full simulation verifications. The Arasan MMC / eMMC Host IP Core has been widely used in different MMC applications by major semiconductor vendors with proven silicon.
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IP Reuse
IC Manage Global Design Platform (GDP & GDP-XL) includes an open platform for maximizing IP reuse. Design and verification teams can use the system to rapidly publish and integrate IP into existing flows, and to trace bug dependencies. Internal and third party IP can be imported or linked with IP Central from multiple commercial and open source design management systems, as well as internal revision control systems. ”
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MIPI Soundwire Total IP Solutions
Soundwire
Soundwire is suited for small, cost-sensitive audio peripherals such as modern digital class-D amplifiers and digital microphones. The Total MIPI SoundWire IP Solution from Arasan enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package that includes the Verilog RTL source code for Master and Slave, fully validated for compliance with the standard, a comprehensive test environment with a compliance suite for verification of the IP package, a SoundWire Hardware Development Kit (“HDK”) for FPGA prototyping, a SoundWire protocol analyzer and a complete SoundWire software stack.
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Ethernet Testing Network Performance
Networked Communication Solutions, LLC
Xena Networks and Veryx Technologies have created an innovative Ethernet test platform that combines Xena’s high performance, wire-speed Ethernet test hardware with Veryx’s broad portfolio of IP & Ethernet functional and conformance test suites. The result: an affordable, high-performance platform for IP & Ethernet load stress, protocol conformance & functional verification testing.
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Field Ttesters
Our product range comprises from small handheld, battery fed testers to full featured service performance assurance tools and distributed monitoring systems. We have several product lines including:QoS / SLA verification system Ethernet, IP, Critical Data, VoIP, IPTV .Hand-held testers: Gigabit Ethernet, Synchronous Ethernet, E1, PDH, SDH, Ethernet, IP, Jitter, Wander, Datacom, Frame Relay, etc.
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Waterproof Test Chamber
JL-XC
JL-XC series waterproof test chamber is mainly used for small electronic and electrical products. Such as lamps, electrical cabinets, electrical components and so one. The products are tested for physical and other related properties under simulated climatic conditions. After the test, it is judged whether the performance of the product meets the requirements by verification, so as to be used in the design, improvement, verification and factory inspection of the product. Comply with IEC60529:2001 《Degrees of protection provided by enclosures (IP Code)》, GB4208-2008 《Shell Protection Grade (IP Code)》 14.2.8 Terms and GB7000.1 《Lamps Part 1: General Requirements and Tests》 9.2.9 Terms.
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Emulation Platform
Veloce
The Veloce® Emulation Platform dramatically reduces risk in the verification of today’s complex SoCs and is a core technology in the Mentor Enterprise Verification Platform™ (EVP). Mentor’s software and application solutions and continual enhancements enable a comprehensive verification environment for IP, chip, and system level verification.
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Verification IP's
SmartDV Technologies India Private Limited
We develop Verification Components, leveraging our rich experience in ASIC / SoC design verification and capabilities on high-level verification languages (HVLs). Our verification components are configurable, reusable plug-and-play verification solutions for standard interfaces based on HVL. We currently support SystemVerilog, Vera, SystemC, Specman E and Verilog. All our VIP''s are supported natively in SystemVerilog VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env.
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Tools & IP
The Developer’s Suite is based on more than 25 years of development and continuous improvement arising from valuable customer feedback. When used together with Intel’s design tools, the Developer’s Suite provides a market-unique solution that can achieve unmatched development productivity. The Gidel Developer’s Suite includes the following components:
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Hybrid Verification Platform
HES-DVM
HES-DVM™ is a fully automated and scalable hybrid verification environment for SoC and ASIC designs. Utilizing the latest co-emulation standards like SCE-MI or TLM and newest FPGA technology, hardware and software design teams obtain early access to the hardware prototype of the design. Working concurrently with one another they develop and verify high-level code with RTL accuracy and speed-effective SoC emulation or prototyping models reducing test time and a risk of silicon re-spins.
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IP Transmitter
WDFZ-5T/10T/15T/20T
The new DC IP transmitter system is composed of WDZ-5A (WDZ-10) rectification power supply (including balanced load controller) and WDFZ-5T (WDFZ-10T) multi-channel high-power intelligent transmitter.
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Power Management IP
We provide a comprehensive set of silicon-proven, compatible IP clusters with the most advanced low-power design techniques.
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PAT and Installation Verification Unit
PowerCheck 1557
The PowerCheck 1557 is a comprehensive PAT and installation verification checkbox. It carries out ongoing performance checks to ensure accurate measurement between calibration intervals. Fully tests Earth Continuity, Insulation Resistance, RCD Trip Time, RCD Trip Current, Loop, PE Conductor Current, Touch Current and Flash tests.
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IP Gateway
3507Rx
Hangzhou Softel Optic Co., Ltd.
SFT3507Rx IP to ASI Gigabits gateway is a head-end interface device which is used for DVB ASI and Ethernet . As a kind of IP receiver, this device can recover UDP database received from the transporting device into TS stream and then output it through the ASI output interfaces. Moreover, it has the function to resist the IP transporting jitter, and to restore the PCR of the TS stream. This device can maximum receive 12 channel IP and output 12 ASI, also, it can simultaneously transmit the 12 IP stream into 12 TS stream.
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IP Gateway
SFT3508F/SFT3508F-10 (SFT3508F-M)
Hangzhou Softel Optic Co., Ltd.
*8 Data ports ( SFT3508F/SFT3508F-M) :First Data port: IP out over HTTP, UDP (SPTS), HLS and RTMPData CH1-7 ports: IP in over HTTP, UDP (SPTS), RTP (SPTS), RTSP and HLSIP out over HTTP, HLS and RTMP (Unicast)*10 Data ports ( SFT3508F-10) :First Data port: IP out over HTTP, UDP (SPTS), HLS and RTMPData CH1-9 ports: IP in over HTTP, UDP (SPTS), RTP (SPTS), RTSP and HLSIP out over HTTP, HLS and RTMP (Unicast)*Support TS files uploading through Web management*Support IP anti- jitter function*Support adding scrolling caption, welcome words, boot image and boot video (this function is only applicable to IP out application and the STB/Android TV must be installed SOFTEL IPTV APK)*Support downloading SOFTEL IPTV APK directly from this device *Support about 80 HD/SD programs (Bitrate:2Mbps) When HTTP/RTP/RTSP/HLS is converted into UDP (Multicast),the actual application shall prevail, and suggest maximum 80% CPU utilization*Support program playing with APK downloaded android STB and TV, maximum 150 terminals
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IP code Testing
Educated Design & Development, Inc.
Complies with various IEC, EN, CE, VDE, UL & CSA requirementsUnit comes with NIST traceable / ISO 17025 accredited certificate of calibration.ED&D is ISO 17025 accredited by ACLASS, an ILAC Member. Measurement data and uncertainty data is available.Uses RTS-01 Rain Spray Head
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Test Program Quality Verification
CodeReport
CodeReport is an easy-to-use application for verifying test program quality. CodeReport comes with many different, known quality screening rules that can be used to verify your test program is complete and ready for production. CodeReport also provides a graphical Rule Editor that allows you to create your own, custom rules. Ensure your coding standards and quality specifications are correct by generating your set of rules, checks, and screenings. Easily generate a detailed report for locating, correcting, and documenting the state of your test program. Quickly identify the tester hardware and instrumentation needed to run your program with the Tester Resource report. Save a session file to quickly return to your project after edits have been made or use the Session on other similar projects to transfer your configuration and custom rules.
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IP Address Manager
IP address management software designed to save time and prevent costly errors
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SoC Signoff & Structural Verification
Defacto’s STAR augments existing RTL verification flows by providing fully automated structural checks. Users can also define and build their custom checks.
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IP Gateway
SFT3508F
Hangzhou Softel Optic Co., Ltd.
SOFTEL SFT3508F IPTV Gateway is a device which is used for the protocol conversion scenarios and streaming media distribution scenarios. It can convert the broadcast network IP stream over HTTP, UDP, RTP, RTSP and HLS and TS file into HTTP, UDP, HLS and RTMP protocol. The system can achieve the integration by receiving a variety of commercial streaming media services. Also, the system can provide streaming media services directly.
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Barcode Verification Systems
REA PC-Scan LD4
The REA PC-Scan LD4 is a barcode verifier made in Germany which was developed in conformity with international standards. It is especially designed for measuring barcodes with highest precision. The combination of state-of-the-art technology, process reliability and intuitive operation makes the REA PC-Scan LD4 globally unique in its class. Final statements "Pass" or "Fail" are central display elements and enable an immediate result. The simultaneously displayed details allow for an immediate and exact barcode quality analysis.
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Functional Verification Platform
Riviera-PRO
Riviera-PRO™ addresses verification needs of engineers crafting tomorrow’s cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest Language and Verification Library Standards.
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Verification Suite
Cadence is committed to providing industry-leading bare metal compute, the fastest verification engines, and the smartest verification applications so you can find and fix the most bugs per dollar compute per day.
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EBIRST 200-pin LFH Verification Fixture
93-002-101
The 93-002-101 200-pin LFH Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions.. The tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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MCB Thermal Verification Test Bench
The test system is a special version of the thermal test test system in the sense that the test jig is primarily designed to hold and connect multi pole MCBs for thermal verification so that each pole can be verified to trip within the IEC time band after the MCB has been riveted. This test ensures the trip verification of MCB so as to trip all the 4 poles at once when overload is detected in one single pole. In short, this is a verification-only bench.
